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Nordic Semiconductor /nrf51 /LPCOMP /INTENSET

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Interpret as INTENSET

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Disabled)READY 0 (Disabled)DOWN 0 (Disabled)UP 0 (Disabled)CROSS

READY=Disabled, UP=Disabled, CROSS=Disabled, DOWN=Disabled

Description

Interrupt enable set register.

Fields

READY

Enable interrupt on READY event.

0 (Disabled): Interrupt disabled.

1 (Set): Enable interrupt on write.

1 (Enabled): Interrupt enabled.
DOWN

Enable interrupt on DOWN event.

0 (Disabled): Interrupt disabled.

1 (Enabled): Interrupt enabled.

1 (Set): Enable interrupt on write.
UP

Enable interrupt on UP event.

0 (Disabled): Interrupt disabled.

1 (Enabled): Interrupt enabled.

1 (Set): Enable interrupt on write.
CROSS

Enable interrupt on CROSS event.

0 (Disabled): Interrupt disabled.

1 (Set): Enable interrupt on write.

1 (Enabled): Interrupt enabled.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data